1. Field of the Invention
The present invention relates to a semiconductor integrated circuit.
2. Description of the Related Art
When a semiconductor integrated circuit operates at a low voltage and low temperature, a delay characteristic extremely becomes large as compared to at room temperature. This phenomenon is referred to as low temperature worst, and conspicuously occurs along with the miniaturization of a semiconductor integrated circuit and the voltage lowering of a power supply voltage. Low temperature worst is a completely opposite characteristic to a well-known phenomenon saying that “a delay characteristic at a low-temperature operation becomes small as compared to room temperature”. This means that the concept of conventional common-sense high temperature worst is not in currency.
To guarantee the operation of a semiconductor integrated circuit, a timing design is performed on a maximum delay characteristic and a minimum delay characteristic. The delay characteristic of the semiconductor integrated circuit becomes large at a low voltage and becomes small at a high voltage. Therefore, in a conventional design in which the concept of high temperature worst is in currency, a timing design for a maximum delay characteristic is performed at a low voltage and high temperature and a timing design for a minimum delay characteristic is performed at a high voltage and low temperature. Additionally, in the design of the low-voltage-operation semiconductor integrated circuit in which low temperature worst occurs as will be noted from simulation, timing verification and operation guarantee of semiconductor integrated circuit are performed by using a delay characteristic at a low voltage and low temperature. Therefore, the operable maximum frequency of the semiconductor integrated circuit is decided by a delay characteristic at a low voltage and low temperature that becomes an extremely large delay characteristic as compared to room temperature.
However, the junction temperature of a transistor constituting a semiconductor integrated circuit speedily rises due to self-heating when an operation starts even in an extreme low temperature environment. In other words, because operation guarantee is conventionally performed for an extremely short time until the junction temperature of the semiconductor integrated circuit rises, a timing design is excessively performed.
In the conventional design in which the concept of high temperature worst is in currency, because a timing design at low temperature guarantees the operation of the semiconductor integrated circuit based on a small delay characteristic as compared to room temperature, there is a problem in that a circuit scale is increased by the insertion of a delay circuit and a design turn-around time is increased by the difficulty of design.
Additionally, in the design of the low-voltage-operation semiconductor integrated circuit in which low temperature worst occurs, because an operation is guaranteed at a maximum frequency due to an extremely large delay characteristic as compared to room temperature, there is a problem such as the increase of circuit scale caused by the use of a large driving-force cell, the increase of leakage currents caused by using a low circuit-threshold cell, or the increase of design turn-around time caused by the difficulty of design.
Semiconductor integrated circuits that solve the problem are disclosed in, for example, Japanese Patent Application Laid-open No. H8-78612 and Japanese Patent Application Laid-open No. 2007-258216. The semiconductor integrated circuits disclosed in these documents actuates a heat generating circuit when the temperature of the semiconductor integrated circuit is lower than the reference temperature and raises the temperature of the semiconductor integrated circuit in order to guarantee a normal operation at a low-temperature operation.
In other words, the semiconductor integrated circuit disclosed in Japanese Patent Application Laid-open No. H8-78612 (FIG. 1) utilizes a ring oscillator as a heat generating circuit, utilizes a resistor that has a positive temperature coefficient and a resistor that does not have a temperature coefficient for the detection of temperature, enables the control of the heat generating circuit by temperature by comparing voltage variation by the resistor with a reference voltage by using a comparator, and controls the temperature of the semiconductor integrated circuit to a predetermined temperature.
However, in the semiconductor integrated circuit disclosed in Japanese Patent Application Laid-open No. H8-78612, the heat generating circuit is activated when the temperature of the semiconductor integrated circuit is lower than the set reference temperature irrespective of the following voltages at the high voltage at which the concept “a delay characteristic at a low-temperature operation becomes small as compared to room temperature” of high temperature worst is in currency and at the low voltage at which low temperature worst “a delay characteristic at a low-temperature operation becomes large as compared to room temperature” occurs. Therefore, the expected effect is not obtained at a low or high voltage and thus a normal operation cannot be guaranteed.
Moreover, Japanese Patent Application Laid-open No. H8-78612 discloses that a heat generating circuit is arranged on the surface of chip and is not incorporated into the chip. In this way, such a configuration shows an effect that a cost is reduced or an effect that incorporating technology into chip is not necessary. However, because the configuration needs a cost for incorporating a plurality of chips into one package, it is valid to incorporate the same chip from a cost standpoint. A system LSI that incorporates various functions of chips into one chip is today a general technology. A technology for incorporating various functions into a chip is not difficult.
If a method for incorporating a heat generating circuit into a chip is employed, there is a merit such as arranging a heat generating circuit in a range in which a delay characteristic at a low voltage and low temperature has a problem, arranging a heat generating circuit near a place at which a problem particularly occurs, or temporarily utilizing an existing circuit inside a chip as a heat generating circuit. When temporarily utilizing an existing circuit as a heat generating circuit, there is a merit from the viewpoint of square measure because the heat generating circuit is not appended. When arranging a heat generating circuit inside a chip, it is difficult to utilize such a fine arrangement and an existing circuit inside the chip.
Next, the semiconductor integrated circuit disclosed in Japanese Patent Application Laid-open No. 2007-258216 (FIG. 1) utilizes a loop circuit such as a Peltier element, a memory circuit, or an inverter as a heat generating circuit, utilizes the oscillating frequency of a ring oscillator for temperature detection, controls the heat generating circuit by comparison with reference frequency performed by a frequency comparator, in order to controls the temperature of the semiconductor integrated circuit to a predetermined temperature.
However, Japanese Patent Application Laid-open No. 2007-258216 definitely describes that a configuration, which performs the control of temperature by using a measurement value such as the oscillating frequency of a ring oscillator that is decreased in accordance with the rise of temperature, assumes the concept of high temperature worst that “a delay characteristic at a low-temperature operation becomes small as compared to room temperature”. Therefore, it is clear to guarantee the operation of the semiconductor integrated circuit by using a small delay characteristic as compared to room temperature.
In addition, in the technology disclosed in Japanese Patent Application Laid-open No. 2007-258216, because a measurement value such as the oscillating frequency of a ring oscillator further becomes large as compared to low temperature even if the temperature of the semiconductor integrated circuit rises in the heat generating circuit of which the operation starts at low temperature in the case of a low voltage at which low temperature worst seems to occur, the operation cannot be stopped even if the temperature of the semiconductor integrated circuit reaches a predetermined temperature. Therefore, it is not possible to guarantee a normal operation at a low-temperature operation. Moreover, because the control of the heat generating circuit by voltage is not performed in addition to the control of the heat generating circuit caused by temperature, it is not possible to avoid the generation of such a trouble at a low voltage at which low temperature worst seems to occur.